Design of 7～13 GHz Broadband High-efficiency Driver Amplifier
A 7～13 GHz microwave monolithic high-efficiency driver amplifier based on 0.25 μm GaAs PHEMT process is designed.The chip uses a two-stage cascade topology,introduces a common source parallel negative feedback structure in the input stage to broaden the working bandwidth.In order to take into account both the output power and efficiency in the output stage,an equivalent RC model is introduced to fit the optimal impedance of the output transistor.Based on the equivalent RC model,high output power and power added efficiency are achieved by using a reactance matching topology to reduce the loss of the output broadband matching network.The simulation curves agree well with the measured curves,and test results show that during the bandwidth from 7 to 13 GHz,the input VSWR is less than 1.5,the output VSWR is less than 1.8,the linear gain is more than 13 dB,the 3 dB compression point output power is greater than 24 dBm,and the power added efficiency is higher than 35%,and the chip area is 1.8 mm×0.8 mm.
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