基于FPGA软件安全性的HDL编码规范分析与研究
Analysis and Research on HDL Coding Specification Based on FPGA Software Security
曹明 1姜宗维 1李敬磊1
作者信息
- 1. 工业和信息化部电子第五研究所,广东 广州 510610
- 折叠
摘要
随着FPGA的广泛应用,FPGA的运行代码的安全性也越来越重要.文章从HDL编码的角度,研究了影响FPGA软件功能安全性的几个重要因素,分析了信号跨时钟域处理、状态机设计、信号毛刺等因素在编码阶段对软件安全性的影响,并提出了对应的防范措施;形成了基于FPGA软件功能安全性的HDL编码和设计规范,为规避在编码阶段引入软件功能安全性问题提供了一定的依据和参考.
Abstract
With the wide application of FPGA,the security of FPGA running code is becoming more and more important.From the perspective of HDL coding,this paper studies several important factors that affect the functional security of FPGA software,analyzes the influence of signal across clock domain processing,state machine design,signal glances and other factors on software security in the coding stage,and puts forward the corresponding preventive measures.The HDL coding and design specification based on FPGA software functional security is formed,which provides a certain basis and reference for avoiding the problem of software functional security introduced in the coding stage.
关键词
FPGA/HDL/安全性/编码规范Key words
FPGA/HDL/security/coding specification引用本文复制引用
出版年
2024
国家科技期刊平台
NSTL
万方数据