FPGA Implementation of Pseudo-random Sequence Scrambler in DVB-T
Pseudo-random sequence is widely used in pseudo-code ranging,navigation,digital data scramblers,noise generators and communication encryption.In the practical application,the FPGA is usually used to generate pseudo-random sequences,which can bring great convenience to system design or testing.Aiming at the DVB-T standard,based on the linear feedback shift register circuit,a simple and efficient parallel pseudo-random sequence generation method is designed to realize the scrambling of DVB-T system code flow data.The experimental results show that the MATLAB scrambling algorithm results are consistent with the FPGA scrambling module simulation results and hardware implementation results,so the design method is feasible.