首页|高密度印制电路板中BGA与大铜面镀铜极差研究

高密度印制电路板中BGA与大铜面镀铜极差研究

Study on copper plating thickness range between high density PCB BGA and large copper surface

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随着半导体工艺和贴装技术的发展,印制电路板(PCB)集成度进一步提升,PCB产品的球栅阵列(BGA)区域布线密集程度越来越高.采用常规脉冲电镀工艺加工高密度PCB,BGA区域镀铜厚度与大铜面镀铜厚度极差急剧增大,给蚀刻带来了极大的挑战.对特性因子进行分析,验证不同电流密度、波形设置下BGA区域与大铜面铜厚极差,获得减小BGA区域与大铜面铜厚极差的可行方案.
With the development of semiconductor technology and mounting technology,printed circuit board(PCB)integration has further increased,and the ball grid array(BGA)area wiring density of PCB products is getting higher and higher.When high density PCB is processed by conventional pulse plating process,the difference between copper plating thickness in the BGA area and that on the large copper surface increases sharply,which brings great challenges to etching.Through characteristic factor analysis,this paper verifies the copper thickness range between BGA region and large copper surface under different current density and waveform settings,and obtains a feasible scheme to reduce the copper thickness range between BGA region and large copper surface.

ball grid array(BGA)copper thickness rangecurrent densitypulse waveform

谭乔木、顾创鑫、程骄、王俊

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深圳市景旺电子股份有限公司,广东 深圳 518102

景旺电子科技(珠海)有限公司,广东 珠海 519050

球栅阵列(BGA) 铜厚极差 电流密度 脉冲波形

2024

印制电路信息
中国印制电路行业协会

印制电路信息

影响因子:0.243
ISSN:1009-0096
年,卷(期):2024.32(8)