印制电路信息2024,Vol.32Issue(12) :1-4.

CoWoS载板的解锁策略与设计能力验证

CoWoS substrate unlocking strategy and design capability verification

毛忠宇 叶子
印制电路信息2024,Vol.32Issue(12) :1-4.

CoWoS载板的解锁策略与设计能力验证

CoWoS substrate unlocking strategy and design capability verification

毛忠宇 1叶子2
扫码查看

作者信息

  • 1. 深圳市电巢科技有限公司,广东 深圳 518057
  • 2. 威凯检测技术有限公司,广东 广州 510663
  • 折叠

摘要

复杂小芯片载板设计完成并由外包公司交付后,收到的载板设计文件存在文件保存功能的限制.介绍了一种解决方案来解除这种限制,从而允许利用设计文件进行电、热、应力等仿真,便于后续的升级、优化,以及设计质量的检验.在解除功能限制后对其中2对差分信号线进行信号完整性仿真,将仿真结果与载板设计服务公司的仿真结果进行比较,显示两者仿真结果非常接近.

Abstract

After the complex chiplet substrate design is completed and delivered by the outsourcing company,the substrate design file we receive has limitations in the file reading or writing.This article introduces a solution to the removal of some these limitations,making the design files be useable in electrical,thermal,and stress.simulations.Thus the following upgrading and optimization,as well as the assessment of design quality,are convenient.After the functional restrictions are relieved,signal integrity simulation is performed on two pairs of differential signal lines.The simulation results are compared with those of the substrate design service company.It is shown that the simulation results of the two are very close to each other.

关键词

小芯片/载板/转接板/子图/信号完整性

Key words

chiplet/substrate/interposer/subdrawing/signal integrity(SI)

引用本文复制引用

出版年

2024
印制电路信息
中国印制电路行业协会

印制电路信息

影响因子:0.243
ISSN:1009-0096
段落导航相关论文