Research on the hardware acceleration method for elliptic curve operations in zero-knowledge proof
Aims:Aiming at the problems that the pure software deployment of the zero-knowledge proof protocol was difficult to meet the requirements of low latency and low power consumption services,as well as the poor protocol adaptability and long development cycle of the hardware acceleration chip,a streaming computing architecture for elliptic curve point addition computation for zero-knowledge proof was proposed.Methods:The point addition computation hardware was designed.A low-latency and scalable hardware computing unit was designed for high-position modulus operation;and a pipeline was designed by planning the data flow between each computing stage of point addition computation.OpenCL and HLS were used to conduct software-hardware collaborative acceleration for point multiplication and multi-scalar multiplication computing tasks of different scales on the FPGA-based heterogeneous computing platform.Results:On the AMD Xilinx Alevo U50 data center accelerator card,multiple scalar multiplication operations achieved 41.5 times and 3 times faster than single core and 12 core operations on the AMD Ryzen 9 5900X(3.7 GHz)CPU,respectively.The hardware acceleration module achieved a maximum energy efficiency improvement of 12.42 times compared with the pure software mode.Conclusions:This computing architecture effectively improves the utilization rate of hardware resources and reduces the latency and power consumption overhead of elliptic curve operations.
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