中国科学:信息科学(英文版)2024，Vol.67Issue(8) ：343-344.DOI:10.1007/s11432-024-4072-9

A 56 Gb/s DAC-DSP-based transmitter with adaptive retiming clock optimization using inverse-PR-based PD achieving 8-UI converge time in 28-nm CMOS

Shubin LIU Chenxi HAN Xiaoteng ZHAO Yuhao ZHANG Shixin LI Hongzhi LIANG Lihong YANG Zhangming ZHU
中国科学:信息科学(英文版)2024，Vol.67Issue(8) ：343-344.DOI:10.1007/s11432-024-4072-9
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A 56 Gb/s DAC-DSP-based transmitter with adaptive retiming clock optimization using inverse-PR-based PD achieving 8-UI converge time in 28-nm CMOS

Shubin LIU 1Chenxi HAN 1Xiaoteng ZHAO 1Yuhao ZHANG 1Shixin LI 1Hongzhi LIANG 1Lihong YANG 1Zhangming ZHU1
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作者信息

  • 1. Key Laboratory of Analog Integrated Circuits and Systems(Ministry of Education),School of Integrated Circuits,Xidian University,Shaanxi 710071,China
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基金项目

National Key Research and Development Program of China(2022YFB4401904)

National Natural Science Foundation of China(62374126)

National Natural Science Foundation of China(62021004)

National Natural Science Foundation of China(62227816)

出版年

2024
中国科学:信息科学(英文版)
中国科学院

中国科学:信息科学(英文版)

CSTPCDEI
影响因子：0.715
ISSN：1674-733X
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