A 3D MCAM architecture based on flash memory enabling binary neural network computing for edge AI

Maoying BAI ¹Shuhao WU ¹Hai WANG ¹Hua WANG ¹Yang FENG ¹Yueran QI ¹Chengcheng WANG ¹Zheng CHAI ²Tai MIN ²Jixuan WU ¹Xuepeng ZHAN ¹Jiezhi CHEN¹

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作者信息

1. School of Information Science and Engineering,Shandong University,Qingdao 266200,China
2. Center for Spintronic and Quantum Systems,State Key Laboratory for Mechanical Behavior of Materials,School of Materials Science and Engineering,Xi'an Jiaotong University,Xi'an 710000,China
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Abstract

The in-memory computing(IMC)architecture implemented by non-volatile memory units shows great possibilities to break the traditional von Neumann bottleneck.In this paper,a 3D IMC architecture is proposed whose unit is based on a multi-bit content-addressable memory(MCAM).The MCAM unit is com-prised of two 65 nm flash memory and two transistors(2Flash2T),which is reconfigurable and multifunctional for both data write/search and XNOR logic operation.Moreover,the MCAM array can also support the population count(POPCOUNT)operation,which can be beneficial for the training and inference process in binary neural network(BNN)computing.Based on the well-known MNIST dataset,the proposed 3D MCAM architecture shows a 98.63％recognition accuracy and a 300％noise-tolerant performance without significant accuracy deterioration.Our findings can provide the potential for developing highly energy-efficient BNN computing for complex artificial intelligence(AI)tasks based on flash-based MCAM units.

Key words

reconfigurable/multifunction/multi-bit content-addressable memory(MCAM)/bitwise opera-tion/binary neural network/edge AI/flash memory/in-memory computing(IMC)

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出版年

2024

中国科学:信息科学(英文版)

中国科学院

中国科学:信息科学(英文版)

CSTPCDEI

影响因子：0.715

ISSN：1674-733X

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