Abstract
Edge dislocations effectively scatter phonons, leading to exceptionally low lattice thermal conductivity (κ_(lat)) and thus invoke extensive research toward enhancing thermoelectric performance. However, it also severely reduces carrier mobility (µ_H), which ultimately limits overall thermoelectric efficiency. Herein, we build a unified framework that elucidates the impact of dislocations on electronic and thermal transport. We reveal that the charged space surrounding dislocations suppresses µ_H through carrier trapping and scattering. This insight offers a new degree of freedom to design thermoelectric materials by utilizing the electrostatic environment near dislocations. By directly mapping µ_H, κ_(lat), and the thermoelectric figure of merit (ZT) against dislocation density (N_(dis)) and carrier concentration (n_H) in n-type PbSe, we predict a maximum ZT ~1.28 at N_(dis) ~3.2 × 10~(11) cm~(-2) and n_H ~2.9 × 10~(19) cm~(-3). Experimentally, Cu_(0.004)Pb_(0.9)Ge_(0.05)Sb_(0.033)Se with N_(dis) ~5 × 10~(11) cm~(-2) conforms well to the theoretical prediction, achieving a ZT of ~1.3 at 773 K and surpasses previously reported values for PbSe embedded with dislocations. This work advances dislocation engineering from empirical trial-and-error toward a predictive strategy for designing high-performance thermoelectric materials.
NETL
NSTL
Wiley