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Institution of Electrical Engineers
Electronics letters

Institution of Electrical Engineers

0013-5194

Electronics letters/Journal Electronics lettersSCIAHCI
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    Low-profile dual-polarised metasurface-enabled antenna array for base-station applications

    Ji, ShuangLiu, ChangrongLiu, XueguanYang, Xinmi...
    1225-1227页
    查看更多>>摘要:This Letter presents a dual linearly polarised microstrip antenna for base station applications. Firstly, a dual-polarised metasurface-based antenna element employing differential feeding technology is proposed. The proposed antenna element achieves a simulated bandwidth of 11.6% for vertical bar S-11 vertical bar < -15 dB, mutual coupling better than 30 dB, and the cross-polarisation discrimination level over 35 dB. Secondly, based on the antenna element, a 3 x 3 antenna array is eventually presented, which was fabricated and characterised. The measured bandwidth is 12% for vertical bar S-11 vertical bar < -10 dB, and the port-isolation is over 25 dB. The superiorities of low-profile and high port isolation indicate that the proposed design is a promising candidate for sub-6G base-station applications.

    Compact wideband SIW cavity-backed slot antenna using triple resonance and hybrid mode

    Kang, LeWang, MeiZhang, PingZhou, Jin Zhu...
    1227-1229页
    查看更多>>摘要:A compact and wideband slot antenna backed by a square substrate integrated waveguide (SIW) cavity is presented. By exciting the dual-slotted SIW cavity with an offset coaxial feed, a transverse electric (TE)(110) resonant mode along with two hybrid modes as combinations of TE110 and TE120 resonances can be generated within a close range. The triple resonances contribute to producing a wideband response while maintaining a compact antenna structure. An antenna prototype with a total size of 0.49 lambda(0) x 0.49 lambda(0) x 0.16 lambda(0) is manufactured and experimentally tested. Measures results show that an operating band of about 33.0% is obtained. Meanwhile, it also exhibits stable unidirectional patterns and moderate gains over the whole band.

    Spike-driven gated recurrent neural network processor for electrocardiogram arrhythmias detection realised in 55-nm CMOS technology

    Wu, YuancongLiu, Y. H.Liu, ShuangYu, Q....
    1230-1232页
    查看更多>>摘要:In this Letter, an asynchronous spike-driven processor based on gated recurrent neural network algorithm for electrocardiogram (ECG) cardiac arrhythmias detection has been designed. Based on the processor, the proposed ECG detection model, containing a many-to-many gated recurrent unit layer and a fully connected layer, can achieve a high classification overall accuracy of 97.8% using the MIT-BIH arrhythmia database. The processor was fabricated in 55-nm 1P6M CMOS technology. It integrates about 1.4 million logic gates, including 40 KB of on-chip memory within a 4.0 mm(2) die area. The test chip consumes 6.28 mW at real-time operation frequency (200 MHz) with 1.2 V core supply voltage and 2.65 mu W at 1 kHz.

    Improved multiscale local phase quantisation histogram for the recognition of blurred dorsal hand vein images

    Liu, FuJiang, ShoukunKang, BingHon, Tao...
    1232-1235页
    查看更多>>摘要:Vein texture elements in images are sometimes degraded due to centrally symmetric blur, e.g. due to motion of hand or camera not being in focus, which significantly affects recognition systems performance. Multiscale local phase quantisation (MLPQ) can effectively improve system accuracy in the presence of blur by dividing vein images into non-overlapping blocks and extracting multiscale local phase information. However, MLPQ misses some important discriminant information at the intersections of different regions, which leaves room for improving the system performance. In the present work, a multiscale overlapping blocks local phase quantisation (MOLPQ) histogram algorithm is presented to divide the vein image into overlapping blocks and extract multiscale local phase information, which includes the discriminant information lost in MLPQ. MOLPQ is validated via comparison with state-of-the-art recognition algorithms on a normal hand vein database, artificial-blur databases, and a normal-blur database, and the accuracies on the normal hand vein and normal-blur databases are 99.57 and 98.07%, respectively. Additionally, MOLPQ outperforms other methods on all databases in terms of accuracy.

    Weakly supervised retinal vessel segmentation algorithm without groundtruth

    Lu, ZhengChen, DaliXue, Dingyu
    1235-1237页
    查看更多>>摘要:In the current image processing field, medical image segmentation needs a lot of groundtruths, and the process of making these groundtruths is time-consuming and laborious. Thus, a novel retinal vessel segmentation algorithm without groundtruth is proposed in this Letter. The hierarchical clustering algorithm is first used to binary classify vessel and non-vessel pixels. Then classification results based on DRIVE databases are used as pseudo groundtruths to train the neural networks and transfer learning is considered for subsequent processing. Next the trained network is used as the feature extraction tool, by calculating and comparing the difference of image features between the target domain data (DRIVE database) and the source domain data (STARE, CHASE DB1, and HRF databases) extracted from the network. The data required for training is expanded based on semi-supervised clustering in this image feature space, finally the deep neural network is further fine-tuned. Experiments on the publicly available fundus image dataset DRIVE demonstrate that the proposed method outperforms many other state-of-the-art weakly supervised and unsupervised methods.

    0.67-μm2/bitcell two-transistor leakage-based physically unclonable function with native bit-instability of 0.89% at 65 nm

    Li, GangWang, PengjunMa, XuejiaoChen, Bo...
    1237-1239页
    查看更多>>摘要:A compact and robust physically unclonable function (PUF) for secure key generation is proposed. With the help of a cross-coupled amplifier, the leakage-current mismatch between the two transistors was digitised to produce a unique chip identification. The measurement results show that the proposed PUF has the best-in-class randomness and uniqueness, as well as the following features: (i) an ultra-small PUF cell with a minimum feature size of 159 F-2, being the lowest reported to date in CMOS, (ii) a low native BER (bit-instability) of 0.16% (0.89%) was measured at the golden condition, and (iii) an autocorrelation of 0.007 at 95% confidence was achieved.

    Pipelined extended-counting IΔΣIΔΣ for 3D-stacked CMOS image sensors

    Callen, N.Lefebvre, J.Gielen, G.
    1239-1241页
    查看更多>>摘要:A novel multi-stage pipelined extended-counting (EC) I Delta Sigma for 3D-stacked CMOS image sensors is presented, which combines the benefits of a pipelined ADC, a first-order I Delta Sigma ADC and the EC principle in order to simultaneously achieve a high resolution and a high frame rate for 3D-stacked imagers. By assigning each stage of the pipeline to a sub-column of pixels while choosing another input stage of the pipeline when a sub-column has been read out, discontinuous rolling shutter artefacts like chopped images can be eliminated and frame rates up to 340 fps can be achieved for imagers with 8 K resolution.

    Efficient sharpening CIC filter embedding fifth-order filter with coefficient optimisation algorithm

    Lin ZhibinGao BoYin RuotongGong Min...
    1241-1243页
    查看更多>>摘要:This Letter presents an optimised cascaded integrator comb (CIC) filter sharpening algorithm embedding a fifth-order finite impulse response filter, which improves the worst-case alias rejection and simultaneously compensates the passband droop. The sharpening filter is designed without multipliers, which reduces hardware complexity. The results of a fourth-order CIC filter design practice show that the proposed algorithm improves the worst-case alias rejection to 128 dB, meanwhile the passband distortion is only 0.015 dB.

    High-performance and single event double-upset-immune latch design

    Zhang, HainengLiu, ZhongyangJiang, JianweiXiao, Jun...
    1243-1245页
    查看更多>>摘要:This Letter proposes a single event double-upset (SEDU)-fully-tolerant latch, referred to as FBSET, mainly featuring four interlocked branch circuits implemented by stacking three PMOS and one NMOS transistors or three NMOS and one PMOS transistors to achieve low power dissipation. The latch exhibits up to 84.56% area-power-delay product saving compared with recently reported latches. Simulation results validate that the proposed latch is completely immune to SEDU.

    Step-controllable RF MEMS tunable capacitor with ultra-wide tuning range using netted metal membrane

    Cho, H.Kim, J.Park, J. Y.
    1245-1247页
    查看更多>>摘要:In this Letter, step-controllable radio frequency (RF) microelectro-mechanical systems (MEMS) tunable capacitor with ultra-wide tuning range using netted membrane structure has newly proposed, fabricated, and characterised for highly miniaturised and reconfigurable RF devices and systems applications. The proposed tunable capacitor could step-wise increase the capacitance by introducing a few slits on the movable top membrane with a netted structure. The fabricated tunable capacitor exhibited 2.38-20.04 pF of tuning range and 146 (off-state) and 28 (full contacted-state) of quality factors at 1 GHz, respectively.